We report on a significant pFET external resistance reduction (~40%) and corresponding 10% RON decrease by nanosecond laser annealing of S/D structures applicable to advanced technology nodes.
A new technical paper titled “Thermal Boundary Resistance Reduction by Interfacial Nanopatterning for GaN-on-Diamond Electronics Applications” was published by researchers at University of Bristol, ...
Some results have been hidden because they may be inaccessible to you
Show inaccessible results