In today’s ever-shrinking IC package design cycles, it is almost imperative that we catch and correct routing issues as early as possible, which makes simulation an integral part of the design cycle.

Statistical signal integrity analysis applies probabilistic and statistical methods to the characterisation, prediction and mitigation of signal degradation in high-speed digital interconnects. As ...

The relentless pursuit of higher performance and greater functionality has propelled the semiconductor industry through several transformative eras. The most recent shift is from traditional ...

As every engineer learns at an early stage, clock edges must be obeyed. In the digital domain, synchronization through global and local clock trees, slew rate and rising/falling times all combine to ...

Signal integrity (SI) and power integrity (PI) are two distinct but related realms of analysis concerned with proper operation of digital circuits. In signal integrity, the main concern is making sure ...

At process technologies of 0.13 µm and smaller, achieving timing closure for system-on-a-chip (SoC) designs becomes a slippery goal. Ever-tinier interconnects are packed closer together, yielding ...

Yesterday, I started to talk about how new technologies find their way over time into EDA tools in my post How Technologies Get into EDA. Let’s look at signal integrity as an example. We used not to ...

As a signal travels across a network, it focuses only on what it sees in its path. And increases in data rates over the past few decades have made this path a bit more clouded. System infrastructure ...